74F00 DATASHEET PDF

74F00 Datasheet, 74F00 Quad 2-input NAND Gate Datasheet, buy 74F no Sb/Br). CU NIPDAU. LevelC-UNLIM. 0 to 74F SNJ54F00FK. ACTIVE . Reproduction of significant portions of TI information in TI data sheets is. 74F00 Quad 2-Input NAND Gate. This device contains four independent gates, each of which performs the logic NAND function.. Order Number 74F00SJ.

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To present basic characteristic and limitations of gates. Digital logic is implemented using integrated circuits which are classified into families based on their basic electronic structure. Another common structure is CMOS complementary metal-oxide-silicon technology which exhibits low power and daasheet noise immunity.

Within the TTL family, there are many second-generation families, each with different operating characteristics.

Two important factors in the consideration of each logic family are speed and power consumption. These two tend to be directly related, daatsheet. Families can be characterized by the relationship between propagation-delay and power. The chart shows the speed-power relationship of common TTL families. Digital IC manufacturers are continually trying to minimize the delay-power product and continue to produce families with different characteristics to suit specific needs.

The following table is a growing list of various sub-families with their characteristics and designations. In order to put into perspective where the above devices fit into the scheme of things and how far we have come, it would be daatsheet to look at a chronology of computer electronics. If you examine a typical circuit board today you will datashdet more use of large ICs with hundreds of pins and fewer style ICs.

Complex electronic circuits for high volume production are produced today using ASICs application specific ICs compiled entirely using a computer-aided design CAD system. All simulation and debugging datqsheet conducted on the computer before the chip is created.

74F00 Datasheet pdf – Quad 2-Input NAND Gate – Fairchild Semiconductor

The final chip may either be burned on the spot using a programmable logic array PLA or may be produced in higher volumes by the IC manufacturer. Regardless of the IC’s complexity or how it is created, basic knowledge of gates and flip-flops is still essential.

In this diagram, observe that the output stage consists of two active elements, Q3 and Q4. This configuration with Q4 stacked on top of Q3 is referred to as a totem-pole output. Also shown in Figure 6. At any time, only one of the two switches is closed while the other is open.

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Datazheet other words, when Q3 is closed, Q4 is open. Conversely, when Q3 is open, Q4 is closed. Open-Collector Output Figure 6. Observe here that the circuit elements associated with Q4 in the totem-pole circuit are missing and the collector of Q3 is left open-circuited, hence the name open-collector.

An open-collector output has current sinking capabilities, that is, it can present a logic-LO output. In contrast with a normal totem-pole output, it cannot be the source of current and therefore cannot present a logic-HI on its own. In normal usage a logic-HI is provided by an external pull-up resistor as shown. Outputs of several open-collector gates may be directly wired together to form a wired-OR logic function for negative logic. This is useful for creating a party-line data bus or control bus whereby any one of several circuits may pull the line LO without causing 740f0 to another active output.

A good analogy to this is the pull-cord on a city bus which one pulls when requesting the driver to stop. What is meant by tri-state or 3-state outputs? Let us examine the typical totem-pole output once again.

The first two conditions show the normal totem-pole operation. The voltage at the output pin is indeterminate and is 740f0 to be floating. This is called the high impedance or Hi-Z state.

This third state is a useful feature and is employed in tri-state outputs as another way of creating party-line bus systems. The tri-state bus driver has an enable input G. When G is LO, the output is in the high impedance state. Bus drivers with tri-state outputs are connected together to create a bus system.

Only one driver must be enabled at any time otherwise a xatasheet will occur. To give students a sense of the magnitudes of voltage, current, resistance, capacitance, time, frequency, etc. That is, from Ohm’s Law one talks about 1 volt across 1 ohm produces 1 ampere.

An unconnected input is said to be floating. Measure the voltage present at the input pin when no connection is made to it. Does this input constitute 740f0 logic LO or logic HI input? What is the voltage range datashete would be considered a logic LO?

What is the range that would datawheet considered a logic HI? Use a 1K potentiometer to supply a variable input voltage. Measure both the input voltage and the logic output of the inverter. Be sure to measure the transfer function for both increasing as well as decreasing input voltages. What is the meaning of hysteresis? What is the input hysteresis in volts for these two gates?

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What is the diference between a inverter and a Schmitt trigger? Where would you use dataxheet latter instead of the former? Problem 3 – Input Currents The inputs of logic gates present loads within a circuit. These loads are characterized as input currents and will differ depending on whether the input logic level is LO or HI.

What is the lowest value of R such that the output is still HI? In order for outputs to present a logic LO they have to have current-sinking capabilities. What is the smallest value of R such that the output is still LO? What are the criteria for determining the value of the pull-up resistor for an open collector output? Calculate the range of values for this resistor. The propagation delay inherent in gates can be useful for creating oscillatory circuits.

Study the feedback circuits shown and use the oscilloscope to examine the signal at different stages in the circuit. Analyze the circuits and explain the results. From the measurements taken determine the propagation datasheft of a typical gate. Problem 7 – Schmitt trigger oscillator Construct this simple oscillator and measure the frequency of oscillation for a datqsheet R and C.

How is the frequency affected by values of R and C? What is the minimum dwtasheet maximum values of R and C?

Philips – 74f00 Quad 2-input NAND Gate Soic-14 -100pcs N74F00D

What is the minimum and maximum frequency of oscillation? Problem 8 – Timer The timer IC is a popular circuit for generating asymmetric rectangular waves. Construct the catasheet shown and study how the frequency and duty cycle are affected by R2 and C. Datashet a very high frequency clock input measure the propagation delay of a typical 74xx or 74LSxx TTL gate. Problem 10 What is meant by negative logic? Why is negative logic commonly used?

What is the difference between open collector, tri-state and totem-pole outputs? What happens when the outputs of two totem-pole outputs are connected together? What is the maximum current flowing through the outputs in c? When and why would you use tri-state and open-collector outputs as opposed to totem-pole outputs? Problem 11 – Monostable Multivibrator The circuit shows one-half of a 74LS dual “one-shot” monostable multivibrator being used to generate a pulse of adjustable width.

Construct and test this circuit. Draw the input and output waveforms timing diagram.